title: "Direct Digital Wavelet Synthesis for Embedded Biomedical Microsystems"
date: 2018-10-17T15:26:46+01:00
draft: false
toc: true
type: posts
math: true
tags:
- publication
- CMOS
- digital-logic
- signal-synthesis
- wavelets
---
Lieuwe B. Leene, Timothy G. Constandinou
Department of Electrical and Electronic Engineering, Imperial College London, SW7 2BT, UK
Centre for Bio-Inspired Technology, Institute of Biomedical Engineering, Imperial College London, SW7 2AZ, UK
# 1 Abstract
This paper presents a compact direct digital wavelet synthesizer for extracting phase and amplitude data from cortical recordings using a feed-forward recurrent digital oscillator. These measurements are essential for accurately decoding local-field-potentials in selected frequency bands. Current systems extensively to rely large digital cores to efficiently perform Fourier or wavelet transforms which is not viable for many implants. The proposed system dynamically controls oscillation to generate frequency selective quadrature wavelets instead of using memory intensive sinusoid/cordic look-up-tables while retaining robust digital operation. A MachXO3LF Lattice FPGA is used to present the results for a 16 bit implementation. This configuration requires 401 registers combined with 283 logic elements and also accommodates real-time reconfigurability to allow ultra-low-power sensors to perform spectroscopy with high-fidelity.
# 2 Introduction
Spectrum analysis is an essential tool for many biomedical applications to provide electrode impedance characteristics[^2][^1] and assist in signal decomposition for brain machine interfaces (BMI)[^4][^3]. These techniques typically rely on generating a precise reference tone to characterise the spectral power distribution of a signal or analyse the frequency dependent response of a subsystem. However generating a sinusoid demands a significant mount of valuable hardware resources for both analogue[^5] and digital[^6] implementations and can inhibit an efficient solution. For this reason numerous techniques such as ΔΣ\:modulation[^7] and closed loop adaptive filtering[^8] have been proposed to reduce system integration costs and enhance the capability of biomedical sensing systems.
In line with these developments, this work proposes a hardware efficient direct digital wavelet synthesizer (DDWS) to extract both time and frequency information simultaneously. The DDWS extends on conventional direct digital frequency synthesis (DDFS) systems[^9] the same way the generalised s-transform[^10] extends on the Fourier transform by resolving the time-evolving frequency content of non-stationary signals. Current systems typically use the CT/DT wavelet-transform to extract this type of information because it is more hardware efficient than the windowed/short-time Fourier transform[^11]. However for applications like electrode-impedance spectroscopy and measuring phase synchrony in brain activity, wavelets cannot be used because the phase information is either not preserved or does not use a global reference leading to incomplete measurements. This presents an opportunity for mixed signal techniques to be used instead of resorting to transforms in the digital domain to extract time-frequency-phase signal components[^12]. The DDWS presents one approach to reduce hardware requirements for this type of measurement because it allows the direct extraction of a specific signal band but also appropriately decimates the output as each wavelet correlation yields a single result for that particular time-frame thereby reducing overall data rate.
{{<figuresrc="/images/biocas2018/concept.svg"title="Figure 1: Instrumentation system that extracts non-stationary frequency components from electrode recordings using wavelets that are generated by the proposed DDWS."width="500">}}
The overall system architecture is shown in Fig. 1. This represents the front-end for a local-field-potential decoding system for BMIs[^13]. After amplification the electrode potential is mixed with two quadrature wavelets that have 50% overlapping time-frames. Similar to conventional spectroscopy[^6], the phase and amplitude can be recovered for each frame by evaluating the down-converted DC-component and will correspond to the frequency band set by the DDWS configuration. The DDWS will generate timing information for each frame that can be used to reset an analogue integrator that proceeds the mixing process and accurately extract the DC value. The proposed topology follows the principle of analogue-to-information conversion where the input signal is mixed linearly/non-linearly to maximally reduce the sampling speed of the data converter and optimise the spectral efficiency at the output. This alleviates the speed of signal conversion and digital processing. If the synthesis of these wavelets can be made highly resource efficient and programmable, several signal features can be directly extracted in the analogue domain by using multiple DDWS modules in parallel.
The rest of this paper if organised as follows: Sec 3 will introduce a recurrent digital oscillator core that forms the basis of the DDWS. Sec 4 describes the DDWS topology and Sec 5 presents synthesis data together with simulation results. Finally, Sec 6 will conclude this work.
# 3 A Feed-Forward Digital Oscillator Core
{{<figuresrc="/images/biocas2018/core.svg"title="Figure 2: Feed-forward digital oscillator showing the block diagram in (a) and the z-domain pole-zero plot of the feedback loop in (b) with decreasing k for a fixed frequency."width="500">}}
There are a number of recursive oscillator topologies available in the literature with two identifiable basis; biquads and waveguides[^9]. The feed-forward structure proposed here is derived from the standard coupled quadrature structure that provides feedback with equi-amplitude quadrature outputs. This structure is shown in Fig. 2a. The feed-forward configuration uses two integrators in negative feedback with two coefficients f and k to specify frequency and Q-factor respectively. This will require the same number of coefficient multiplications as the coupled quadrature configuration but uses 4 2-input summation nodes opposed to 2. The benefit here is that there are only 2 scaling coefficients and they are linearly dependent on the desired oscillation frequency. The conventional structure has f²\:dependence that requires excessive integrator precision to accurately resolve very small frequencies typically of interest for biomedical signals.
Digital oscillators are usually characterised in terms of a rotation matrix \\(\mathbf{R}\\)(k,f) that is applied to two state variables x<sub>Q<sub> and x<sub>I<sub>. This representation is formulated in Eq. 1. For clarity the k²\: factor is ignored in this analysis since it yields a simpler solution to the basic feed-forward configuration. In this case we are interested in manipulating the pole location adaptively which is why we will solve for the complex pole positions of this dynamic system below.
$$ denum\left(\frac{1}{1+D_O(z)}\right) = z^2 + (2 f k - 2)z + (f^2 - 2 f k + 1 ) $$
The z-domain representation of the open loop response D<sub>O<sub> is shown in Eq. 2 and the the corresponding expression for the denumerator of the closed loop response is shown in Eq. 3.
$$ \begin{split}poles\left(\frac{1}{1+D_O(z)}\right) = 1 - k f \pm √{ f^2 k^2 - f^2}\end{split} $$
Finding the poles yields the two solutions in Eq. 4 that correspond to the complex pair P\tss{Q/I} which dictate the oscillatory behaviour of this circuit. This reveals the behaviour shown in Fig. 2b which is that adjusting k will rotate the pole-pair in and out of the unit circle resulting in a growing or receding complex exponential or oscillation. It is also readily seen that for the case k=0 the pole locations lie outside the unit circle. Solving for a steady state solution where P\tss{Q/I} are on the unit circle gives k=f/2.
In order to realise the proposed multiplier-free DDWS, two additional components will be introduced. The first is a second order digital ΔΣ \: modulator that will allow us to mitigate the need to for high-precision multipliers and the second is a controller module that will regulate the dynamic oscillatory behaviour given a set input parameters. This configuration is shown in Fig. 3 together with sub-blocks for amplitude tracking and noise shaping.
{{<figuresrc="/images/biocas2018/ddws-core.svg"title="Figure 3: Block diagram of the direct-digital wavelet synthesizer showing the system in (a), the amplitude tracking logic in (b) and the ΔΣ² \: modulator in (c)."width="500">}}
Introducing a ΔΣ \: modulator is a well established means reduce hardware complexity for multiplication as the \\(\pm\\)1 single bit-stream implies that the coefficients (f & k) can be directly accumulated accordingly [^14]. This is particularly appropriate here because the typical clock speed will be at a substantially higher frequency than the signal bandwidth of interest. For biomedical systems these frequencies are almost always sub-10 kHz. Hence we can freely choose an oversampling ratio (OSR) according to our dynamic range requirement using DR=-11 dB+50 log(OSR)[^15].
The block diagram in Fig. 3 also includes logic for tracking the peak to peak amplitude of the internal oscillation. This is done by detecting zero-crossings of either integrator and latching the other that will at that moment be at the peak amplitude. The oscillation amplitude is used to control the dynamics of the wavelet generator and prevents saturation.
An overview of the control logic is described in Alg. 1. Here the notation from Eq. 1 is used to simplify how the oscillator states evolve by using the rotation matrix. In the behavioural implementation lines 5-6 are realised by a series of conditional statements that increment/decrement the oscillator states \\(\mathbf{x}\\)\tss{Q/I} and then compute the feed forward value by adding or subtracting k1/k2. Notice that we use the state variable s1/s2 to iteratively make sure only one oscillator is growing in amplitude while the other is shrinking in amplitude but at all times the growth is bounded by how close the peak to peak value is to the target maximum vpp. In fact several configurable parameters are used here in addition to vpp to specify the wavelet dynamics. Like before f controls the oscillation frequency in rads per second. The parameter ic determines the extinction ratio between the minimum and maximum oscillation amplitudes and c<sub>bw<sub> controls the window bandwidth together with ic to allow high or low out-of-band rejection.
Let us briefly identify the type of envelope modulation used here that allows these wavelets to perform time-frequency analysis. First it is important to point out that the phase state of each oscillator is not effected by small changes in k during operation. This means that the phase of the quadrature oscillator always accumulates with respect to the global reset. From our derivation in Sec 3 we can evaluate that, while s1/s2 does not change, the change in envelope can be expressed as Eq. 5 and which is resolved in Eq. 6 to show that the envelope has a sigmoid characteristic. In fact, As s1/s2 toggles the DDWS generates double sided sigmoid with a small discontinuity in the derivative the sinusoids that is proportional to c<sub>bw<sub>.
$$ \frac{dx(t)}{dt} = a x \cdot (b - x(t)) $$
$$ x(t) = \frac{b}{1+(b)e^{-a b x(t)}} $$
# 5 Implementation Results
A behavioural verilog model of the proposed wavelet generator has been implemented and synthesized using a low-power, small-footprint, LCMXO3LF FPGA device from Lattice Semiconductor and the Lattice Synthesis Engine (Version 3.10.2). The logic requirements and simulation results provide preliminary validation and can be further optimised given application constraints such as precision or resource limitations. The synthesis results are presented in Table 1 to show the relative hardware complexity for the 4-ΔΣ\: modulators, the two quadrature oscillators DX 1 & 2, and the top level FSM that controls the dynamics according to the input parameters. These requirements can be further compared using the pie chart in figure 4. Including the modulator hardware is useful if analogue requirements need to be relaxed to 1-bit digital-to-analogue conversion but this may not always be applicable. In fact, if a multi-bit output can be used instead, the modulators can be replaced by two multipliers to further optimise the resource requirements.
Table 1: Synthesis Summary
| Resource | LUT4 | Register | SLICE |
|----|----|----|----|
| FSM | 10 | 24 | 10 |
| DX \: (2x) | 5 | 217 | 125 |
| ΔΣ \: (4x) | 16 | 160 | 112 |
| DDWS Total | 31 | 401 | 252|
{{<figuresrc="/images/biocas2018/resource.svg"title="Figure 4: Resource distribution for the DDWS with the cost each sub-system annotated."width="500">}}
Using a hypothetical configuration, the model was also simulated to demonstrate overall characteristics to filter out a specific 3.5 mHz normalised frequency band. The later implies that a 1.4 kHz system clock yields a 5 Hz center frequency. With reference to Algo \ref{algo:ddws-control} we used the following parameters: f=0.011, OSR=32, vpp=1, ic=2\\(^{-6}\\). In figure 5 c<sub>bw<sub>=2\\(^{-2}\\) and in figure 6 c<sub>bw<sub>=2\\(^{-6}\\) in order to show narrow and wide bandpass selection settings. Both figures show the time & frequency domain characteristics as well as the dynamic change in the pre-scaled feed-forward factor as the amplitude of oscillation increases before the controller changes state and starts suppressing the oscillation to near the end of the time window.
{{<figuresrc="/images/biocas2018/narrow.svg"title="Figure 5: Simulation result showing the transient output after decimation of the two quadrature bit-streams (top), the adaptive control of k (middle), and the frequency response of the generated wavelet. "width="500">}}
{{<figuresrc="/images/biocas2018/wide.svg"title="Figure 6: Simulation result showing similar results as in figure 5 but with a smaller value of c<sub>bw<sub>."width="500">}}
# 6 Conclusion
This work demonstrated a novel approach to generate wavelets using direct digital synthesis opposed to storing them in memory which is particularly useful for ultra-low-power medical devices that need to perform coherent time-resolved analysis of low frequencies. The synthesis results demonstrate that the dynamic approach avoids large memory requirements and digital complexity while retaining high precision frequency selection with reconfigurable bandwidths.
# Refernces:
[^11]: I.Daubechies, ''The wavelet transform, time-frequency localization and signal analysis,'' IEEE Trans. Inf. Theory, vol.36, no.5, pp. 961--1005, Sep 1990. [Online]: http://dx.doi.org/10.1109/18.57199
[^15]: R.Schreier, ''An empirical study of high-order single-bit delta-sigma modulators,'' IEEE Trans. Circuits Syst. II, vol.40, no.8, pp. 461--466, Aug 1993. [Online]: http://dx.doi.org/10.1109/82.242348
[^13]: A.Jackson and T.M. Hall, ''Decoding local field potentials for neural interfaces,'' IEEE Trans. Neural Syst. Rehabil. Eng., vol.25, no.10, pp. 1705--1714, Oct 2017. [Online]: http://dx.doi.org/10.1109/TNSRE.2016.2612001
[^10]: R.A. Brown, M.L. Lauzon, and R.Frayne, ''A general description of linear time-frequency transforms and formulation of a fast, invertible transform that samples the continuous S-Transform spectrum nonredundantly,'' IEEE Trans. Signal Process., vol.58, no.1, pp. 281--290, Jan 2010. [Online]: http://dx.doi.org/10.1109/TSP.2009.2028972
[^14]: C.Basetas, N.Temenos, and P.P. Sotiriadis, ''Comparison of recently developed single-bit all-digital frequency synthesizers in terms of hardware complexity and performance,'' in IEEE Proc. ISCAS, May 2018, pp. 1--5. [Online]: http://dx.doi.org/10.1109/ISCAS.2018.8351798
[^6]: A.Yufera etal., ''A tissue impedance measurement chip for myocardial ischemia detection,'' IEEE Trans. Circuits Syst. I, vol.52, no.12, pp. 2620--2628, Dec 2005. [Online]: http://dx.doi.org/10.1109/TCSI.2005.857542
[^5]: S.Rodriguez, S.Ollmar, M.Waqar, and A.Rusu, ''A batteryless sensor ASIC for implantable bio-impedance applications,'' IEEE Trans. Biomed. Circuits Syst., vol.10, no.3, pp. 533--544, June 2016. [Online]: http://dx.doi.org/10.1109/TBCAS.2015.2456242
[^2]: A.Sun, A.G. Venkatesh, and D.A. Hall, ''A multi-technique reconfigurable electrochemical biosensor: Enabling personal health monitoring in mobile devices,'' IEEE Trans. Biomed. Circuits Syst., vol.10, no.5, pp. 945--954, Oct 2016. [Online]: http://dx.doi.org/10.1109/TBCAS.2016.2586504
[^12]: G.O'Leary etal., ''A recursive-memory brain-state classifier with 32-channel track-and-zoom $\Delta^2\Sigma$ ADCs and charge-balanced programmable waveform neurostimulators,'' in IEEE Proc. ISSCC, Feb 2018, pp. 296--298. [Online]: http://dx.doi.org/10.1109/ISSCC.2018.8310301
[^8]: M.Rajabzadeh, J.Becker, and M.Ortmanns, ''Evaluation of single-bit sigma-delta modulator DAC for electrical impedance spectroscopy,'' in IEEE Proc. BIOCAS, Oct 2017, pp. 1--4. [Online]: http://dx.doi.org/10.1109/BIOCAS.2017.8325063
[^7]: N.Ivanisevic, S.Rodriguez, and A.Rusu, ''Impedance spectroscopy systems: Review and an all-digital adaptive IIR filtering approach,'' in IEEE Proc. BIOCAS, Oct 2017, pp. 1--4. [Online]: http://dx.doi.org/10.1109/BIOCAS.2017.8325148
[^9]: C.S. Turner, ''Recursive discrete-time sinusoidal oscillators,'' IEEE Signal Process. Mag., vol.20, no.3, pp. 103--111, May 2003. [Online]: http://dx.doi.org/10.1109/MSP.2003.1203213
[^4]: Z.Zhang and K.K. Parhi, ''Low-complexity seizure prediction from iEEG/sEEG using spectral power and ratios of spectral power,'' IEEE Trans. Biomed. Circuits Syst., vol.10, no.3, pp. 693--706, June 2016. [Online]: http://dx.doi.org/10.1109/TBCAS.2015.2477264
[^3]: S.R. Sridhara etal., ''Microwatt embedded processor platform for medical system-on-chip applications,'' IEEE J. Solid-State Circuits, vol.46, no.4, pp. 721--730, April 2011. [Online]: http://dx.doi.org/10.1109/JSSC.2011.2108910
[^1]: W.Franks, I.Schenker, P.Schmutz, and A.Hierlemann, ''Impedance characterization and modeling of electrodes for biomedical applications,'' IEEE Rev. Biomed. Eng., vol.52, no.7, pp. 1295--1302, July 2005. [Online]: http://dx.doi.org/10.1109/TBME.2005.847523
