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256 lines
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256 lines
9.8 KiB
Markdown
---
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title: "Lieuwe Leene PhD. MSc. BEng."
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date: 2021-08-23T17:52:07+02:00
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draft: false
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toc: true
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tags:
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- personal
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- resume
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- employment
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---
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Since 2019, I have been part of the [Novelda](https://novelda.com/) RFIC design
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group where we design the most accurate human presence sensor in the world based
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on ultra wide band technology. We are a team of 8 designing a IEEE 802.15
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compliant single-chip solution for short-range radar applications using a
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custom transceiver. I primarily work on the critical timing circuits for clock
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redistribution, frequency scaling, and synchronization taking custom
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mixed-signal circuits from concept and layout implementation all the way to
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characterization and wafer sort planning.
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Prior to 2019 I was with the [NGNI](https://www.imperial.ac.uk/next-generation-neural-interfaces)
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lab at Imperial College London developing implantable medical devices
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specialized for neuro-scientific studies and electroceutical therapies such as
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deep-brain-stimulation and brain-machine-interfaces. I specialized in realizing
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ultra-low-power instrumentation systems that can be implanted and innovated circuit
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techniques for efficiently processing biomedical signals. Most of my success
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came from applying time-domain techniques to realize sensing circuits with
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exceptional dynamic range such that a wider variety of bio-sensor signal components
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can be picked up.
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## Proficiencies
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I present over 10 years of design experience using Cadence and Seimens (Mentor Graphics)
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EDA design suite extensively from process-development-kit integration to mixed-signal
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design verification. I have historically worked in smaller design groups of 5-10
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people where you need to be familiar with the entire development process. This
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would include a design cycle touching on process selection, tool configuration,
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specification, circuit design, verification, and production planning.
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My strengths lie with high-performance circuit design where the value-added
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metrics justify a full-custom design flow. Here I have a solid track record of
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proven silicon some of which is in production. As a counter part to full-custom
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design I find that systematic design flow is incredibly important. This is the
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main drive for skill and python program development such that my team and I
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have a programmatic approach to physical verification, design documentation,
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and reporting simulation data that is is well reasoned before hand.
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Besides that I am very comfortable with software development. At home I
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administer and deploy several web-based hobby projects using ruby and
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postgresql. Some of this is in order to have more privacy control when
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it comes to web-services but I enjoy the process of adopting and learning new
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software tools. Some of my earlier projects at Imperial College were C++
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based with Qt revolved around creating interfaces and visualizing recordings.
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# Employment Record
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{{< columns src="/images/about/novelda_logo_white.svg" >}}
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```
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Staff IC Design Engineer
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IC Design Team Oslo Office,
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Novelda AS Oslo, Norway
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Mar. 2023 - Now
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```
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- Responsible for next-generation Ultra-Wideband RF transceiver synchronization
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and frequency-management sub-system.
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- Designing full-custom high-speed digital logic for both asynchronous and
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timing critical modules.
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- Specification definition and requirements for internal IP together with
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self-test and calibration methodology.
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```
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Senior IC Design Engineer
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IC Design Team Oslo Office,
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Novelda AS Oslo, Norway
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Aug. 2019 - Mar. 2023
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```
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- Responsible for RF transceiver clocking module and phase locked loop design
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for the X7 Ultra-Wideband human presence sensor operating in the 7.8 GHz band.
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- Acting as System and IP integration lead handling design delivery such as
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netlist, layout, timing, and constraint files along with sign-off reports.
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- Developed python utilities with Cadence integration for better circuit
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documentation, verification analysis, and physical verification.
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{{< /columns >}}
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{{< columns src="/images/about/IC_white.svg" >}}
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```
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Research Associate
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Centre for Bio-Inspired Technology,
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Imperial College London, United Kingdom
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Dec. 2016 – Dec. 2019
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```
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- System architect for the ENGINI project worked towards a wireless
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chip scale neural implant for chronic neuroscience and healthcare applications.
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- CMOS fabrication and CAD tool integration lead for the FORTE project
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which aims to integrate memristive devices with standard CMOS.
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- Lead designer for ASIC implementation and defined target deliverables
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Contributed to publications, grants, and the development of intellectual property
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- Facilitated goal driven team management and technical project planning
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Presented at conferences to communicate findings to the academic community
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```
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Analog Signal Processing Technical Committee Member
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Centre for Bio-Inspired Technology,
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Imperial College London, United Kingdom
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Dec. 2015 – Dec. 2019
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```
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- Reviewed 40+ manuscripts from 2015 to 2020 from JSSC, TCASI, TCASII, and TBCAS journals
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- Facilitated ISCAS conference review process for selected analogue signal processing tracks
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- Coordinated a ICECS conference special session on Oscillator Based Computing
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```
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Cadence System Administrator
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Centre for Bio-Inspired Technology,
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Imperial College London, United Kingdom
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Sept. 2012 – Dec. 2019
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```
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- Served as contact for the maintenance of IT infrastructure for research group
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- Provided support for computing solutions and tool configuration
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- Maintained a Linux build for CAD tools (i.e. Cadence, Synopsys, Mentor, CST)
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- Maintained process development kits for core IC technologies (TSMC, AMS, UMC)
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```
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Graduate Teaching Assistant
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Department of Electrical and Electronic Engineering,
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Imperial College London, United Kingdom
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Sept. 2013 – Dec. 2018
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```
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- Supervised & mentored master student final year projects
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- Assisted for laboratory/tutorial IC design sessions as demonstrator
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- Assessed of oral and written work for EE4-20 & EE9-ALAB
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- Lectured analogue IC design topics for EE4-20
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{{< /columns >}}
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{{< columns src="/images/about/hkust_logo.svg" >}}
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```
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Undergraduate Research Assistant
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Department of Electrical and Electronic Engineering,
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Hong Kong University of Science and Technology, China
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Aug. 2010 – May 2011
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```
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- Project Topic: ASIC development for micro electrode array based testing platforms for the study of cell cultures involving low-noise front-end design and analogue-to-digital conversion.
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```
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Undergraduate Research Assistant
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Department of Electrical and Electronic Engineering,
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Hong Kong University of Science and Technology, China
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Jun. 2010 – Dec. 2010
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```
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- Project Topic: Feasibility study of opto-mechanical CMOS structures for
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detecting aerosol micro-particles actuated by photonics involving modelling
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of micro-scale mechanical oscillators for phonon emission.
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{{< /columns >}}
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# Academic Record
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{{< columns src="/images/about/IC_white.svg" >}}
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```
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PhD Electrical Engineering
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Department of Electrical and Electronic Engineering,
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Imperial College London, United Kingdom,
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Sept. 2012 – Aug. 2016
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```
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- Engineering & Physical Sciences Research Council studentship (EPRC-1676620)
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- Thesis Topic: Large scale integration of CMOS based sensors for brain machine interfaces.
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```
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MSc Analogue and Digital IC Design
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Department of Electrical and Electronic Engineering,
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Imperial College London, United Kingdom,
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Sept. 2011 – Aug. 2012
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```
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- Graduated with Distinction
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- Thesis Topic: Ultra-wideband radio and telemetry for medical implants
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- Outstanding achievement prize for the MSc in A&D IC Design
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- Integrated circuit design lab prize for the MSc in A&D IC Design
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{{< /columns >}}
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{{< columns src="/images/about/hkust_logo.svg" >}}
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```
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BEng Analogue and Digital IC Design
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Department of Electrical and Electronic Engineering,
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Hong Kong University of Science and Technology, China
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Aug. 2008 – May 2011
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```
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- Graduated with First-Class Honours
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- Thesis Topic: CMOS Instrumentation for biological in-vitro multi-electrode systems.
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- Swire international young fellows program scholarship
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{{< /columns >}}
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# Other Activities
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{{< columns src="/images/about/IEEE_logo.svg" >}}
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During my tenure at Imperial College, I actively took part in [https://orcid.org/0000-0002-6899-2662](IEEE activities) through
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conference attendance and made contributions to various journal publications.
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- [IEEE Analog Signal Processing Technical Comittee](https://ieee-cas.org/technical-committee/analog-signal-processing-asp) member from 2016 - 2018.
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- Reviewed 40+ manuscripts in the past 5 years from JSSC, TCASI, TCASII, and TBCAS journals.
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- Organized the 2016 ICECS Conference Special Session: Oscillator-Based Computing.
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- Session-chair for IEEE 2017 & 2018 ISCAS Conference and Reviewer from 2013 to 2020.
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{{< /columns >}}
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# Personal Achievements
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{{< columns src="/images/about/sscs_logo.svg" >}}
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One of my main aspirations during my PhD was to publish in the prestigious
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[IEEE Journal of Solid-State Circuits](https://sscs.ieee.org/publications/ieee-journal-of-solid-state-circuits-jssc)
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which I successfully did 2018 on my second attempt. The publication presented
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a voltage-controlled oscillator circuit for sensing neural activity with
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integrated off-set rejection. The publication process took well over half a year
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with the two rounds of peer-review in order to improve the article's presentation.
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{{< /columns >}}
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{{< columns src="/images/about/isa_logo.svg" >}}
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In 2008, together with a couple of friends I founded the
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[International Student Association](https://isa.hkust.edu.hk/) at HKUST which
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as of 2022 is the 3rd largest student organization at the University. When
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I started my studies in Hong Kong the international student community was still
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relatively small and we mostly organized events among our selves. Encouraged
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by the student-office we formed a group to represent the growing body of
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international student and help each other adapt to the university lifestyle
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away from home.
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{{< /columns >}}
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