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29 lines
1.6 KiB
Markdown
29 lines
1.6 KiB
Markdown
---
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title: "Chips"
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date: 2021-08-23T17:52:07+02:00
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draft: false
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toc: true
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tags:
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- personal
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- CMOS
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- fabrication
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- devices
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---
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Here are some of the fabricated chips that I have had the privilege of
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designing over the years. These designs are the result of joint efforts with
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colleges and collaborators. A few designs result from my time at Novelda AS,
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while others were funded though Engineering and Physical Sciences Research
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Council (EPSRC) UK.
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{{< figure src="/images/chips/X7.jpg" title="X7 - A Dual Channel UWB Radar | 2023 | 40 nm CMOS" width="500" >}}
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{{< figure src="/images/chips/X4.jpg" title="X4 - A Single Channel UWB Radar | 2020 | 55 nm CMOS" width="500" >}}
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{{< figure src="/images/chips/C0.png" title="AKIRA - A 18b NS-SAR ADC | 2019 | 0.18 um TSMC" width="500" >}}
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{{< figure src="/images/chips/C1.jpg" title="ENGINI - A Neural Recording SoC | 2018 | 0.35 um AMS" width="500" >}}
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{{< figure src="/images/chips/C2.jpg" title="ENGINI - A Wireless BMI SoC | 2017 | 0.35 um AMS" width="500" >}}
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{{< figure src="/images/chips/C4_mod.png" title="PIKACHU - A Time Domain Instrumentation System | 2016 | 65 nm TSMC" width="500" >}}
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{{< figure src="/images/chips/C5_mod.png" title="GOLEM - A Distributed Neural Processing SoC | 2015 | 0.18 um AMS" width="500" >}}
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{{< figure src="/images/chips/C3_mod.png" title="KIITCHI - An Incremental Instrumentation System | 2013 | 0.18 um AMS" width="500" >}}
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{{< figure src="/images/chips/C6.jpg" title="NGNI32 - Neural Recording ASIC | 2013 | 0.32 um AMS" width="500" >}}
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{{< figure src="/images/chips/C7.jpg" title="NGNI16 - Ultra-Wide Band Transmitter | 2012 | 0.18 um AMS" width="500" >}}
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