mirror of
https://github.com/lleene/hugo-site.git
synced 2025-01-23 12:02:22 +01:00
26 lines
1.3 KiB
Markdown
26 lines
1.3 KiB
Markdown
|
---
|
||
|
|
title: "Chips"
|
||
|
|
date: 2021-08-23T17:52:07+02:00
|
||
|
|
draft: false
|
||
|
|
toc: true
|
||
|
|
tags:
|
||
|
|
- personal
|
||
|
|
- CMOS
|
||
|
|
- fabrication
|
||
|
|
- devices
|
||
|
|
---
|
||
|
|
|
||
|
|
Here are some of the fabricated chips that I have had the privilege of
|
||
|
|
designing over the years. These designs are the result of joint efforts with
|
||
|
|
colleges and collaborators made possible by the Engineering and Physical
|
||
|
|
Sciences Research Council (EPSRC) UK.
|
||
|
|
|
||
|
|
{{< figure src="/images/chips/C0.png" title="AKIRA - A 18b NS-SAR ADC | 2019 | 0.18 um TSMC" width="500" >}}
|
||
|
|
{{< figure src="/images/chips/C1.jpg" title="ENGINI - A Neural Recording SoC | 2018 | 0.35 um AMS" width="500" >}}
|
||
|
|
{{< figure src="/images/chips/C2.jpg" title="ENGINI - A Wireless BMI SoC | 2017 | 0.35 um AMS" width="500" >}}
|
||
|
|
{{< figure src="/images/chips/C4_mod.png" title="PIKACHU - A Time Domain Instrumentation System | 2016 | 65 nm TSMC" width="500" >}}
|
||
|
|
{{< figure src="/images/chips/C5_mod.png" title="GOLEM - A Distributed Neural Processing SoC | 2015 | 0.18 um AMS" width="500" >}}
|
||
|
|
{{< figure src="/images/chips/C3_mod.png" title="KIITCHI - An Incremental Instrumentation System | 2013 | 0.18 um AMS" width="500" >}}
|
||
|
|
{{< figure src="/images/chips/C6.jpg" title="NGNI32 - Neural Recording ASIC | 2013 | 0.32 um AMS" width="500" >}}
|
||
|
|
{{< figure src="/images/chips/C7.jpg" title="NGNI16 - Ultra-Wide Band Transmitter | 2012 | 0.18 um AMS" width="500" >}}
|