hugo-site/content/resume.md

---
title: "Lieuwe Leene PhD. MSc. BEng."
date: 2021-08-23T17:52:07+02:00
draft: false
toc: true
tags:
  - personal
  - resume
  - employment
---


Since 2019, I have been part of the [Novelda](https://novelda.com/) RFIC design
group where we design the most accurate human presence sensor in the world based
on ultra wide band technology. We are a team of 8 designing a IEEE 802.15
compliant single-chip solution for short-range radar applications using a
custom transceiver. I primarily work on the critical timing circuits for clock
redistribution, frequency scaling, and synchronization taking custom
mixed-signal circuits from concept and layout implementation all the way to
characterization and wafer sort planning.

Prior to 2019 I was with the [NGNI](https://www.imperial.ac.uk/next-generation-neural-interfaces)
lab at Imperial College London developing implantable medical devices
specialized for neuro-scientific studies and electroceutical therapies such as
deep-brain-stimulation and brain-machine-interfaces. I specialized in realizing
ultra-low-power instrumentation systems that can be implanted and innovated circuit
techniques for efficiently processing biomedical signals. Most of my success
came from applying time-domain techniques to realize sensing circuits with
exceptional dynamic range such that a wider variety of bio-sensor signal components
can be picked up.

## Proficiencies

I present over 10 years of design experience using Cadence and Seimens (Mentor Graphics)
EDA design suite extensively from process-development-kit integration to mixed-signal
design verification. I have historically worked in smaller design groups of 5-10
people where you need to be familiar with the entire development process. This
would include a design cycle touching on process selection, tool configuration,
specification, circuit design, verification, and production planning.

My strengths lie with high-performance circuit design where the value-added
metrics justify a full-custom design flow. Here I have a solid track record of
proven silicon some of which is in production. As a counter part to full-custom
design I find that systematic design flow is incredibly important. This is the
main drive for skill and python program development such that my team and I
have a programmatic approach to physical verification, design documentation,
and reporting simulation data that is is well reasoned before hand.

Besides that I am very comfortable with software development. At home I 
administer and deploy several web-based hobby projects using ruby and 
postgresql. Some of this is in order to have more privacy control when 
it comes to web-services but I enjoy the process of adopting and learning new
software tools. Some of my earlier projects at Imperial College were C++ 
based with Qt revolved around creating interfaces and visualizing recordings.

# Employment Record

{{< columns src="/images/about/novelda_logo_white.svg" >}}

```
Staff IC Design Engineer
IC Design Team Oslo Office,
Novelda AS Oslo, Norway
Mar. 2023 - Now
```

 - Responsible for next-generation Ultra-Wideband RF transceiver synchronization
 and frequency-management sub-system.
 - Designing full-custom high-speed digital logic for both asynchronous and
 timing critical modules.
 - Specification definition and requirements for internal IP together with 
 self-test and calibration methodology.

```
Senior IC Design Engineer
IC Design Team Oslo Office,
Novelda AS Oslo, Norway
Aug. 2019 - Mar. 2023
```

 - Responsible for RF transceiver clocking module and phase locked loop design
 for the X7 Ultra-Wideband human presence sensor operating in the 7.8 GHz band.
 - Acting as System and IP integration lead handling design delivery such as
 netlist, layout, timing, and constraint files along with sign-off reports.
 - Developed python utilities with Cadence integration for better circuit
 documentation, verification analysis, and physical verification.

{{< /columns >}}

{{< columns src="/images/about/IC_white.svg" >}}

```
Research Associate
Centre for Bio-Inspired Technology,
Imperial College London, United Kingdom
Dec. 2016 – Dec. 2019
```

 - System architect for the ENGINI project worked towards a wireless
chip scale neural implant for chronic neuroscience and healthcare applications.
 - CMOS fabrication and CAD tool integration lead for the FORTE project
which aims to integrate memristive devices with standard CMOS.
 - Lead designer for ASIC implementation and deﬁned target deliverables
Contributed to publications, grants, and the development of intellectual property
 - Facilitated goal driven team management and technical project planning
Presented at conferences to communicate ﬁndings to the academic community

```
Analog Signal Processing Technical Committee Member
Centre for Bio-Inspired Technology,
Imperial College London, United Kingdom
Dec. 2015 – Dec. 2019
```

 - Reviewed 40+ manuscripts from 2015 to 2020 from JSSC, TCASI, TCASII, and TBCAS journals
 - Facilitated ISCAS conference review process for selected analogue signal processing tracks
 - Coordinated a ICECS conference special session on Oscillator Based Computing

```
Cadence System Administrator
Centre for Bio-Inspired Technology,
Imperial College London, United Kingdom
Sept. 2012 – Dec. 2019
```

 - Served as contact for the maintenance of IT infrastructure for research group
 - Provided support for computing solutions and tool conﬁguration
 - Maintained a Linux build for CAD tools (i.e. Cadence, Synopsys, Mentor, CST)
 - Maintained process development kits for core IC technologies (TSMC, AMS, UMC)

```
Graduate Teaching Assistant
Department of Electrical and Electronic Engineering,
Imperial College London, United Kingdom
Sept. 2013 – Dec. 2018
```

 - Supervised & mentored master student ﬁnal year projects
 - Assisted for laboratory/tutorial IC design sessions as demonstrator
 - Assessed of oral and written work for EE4-20 & EE9-ALAB
 - Lectured analogue IC design topics for EE4-20

{{< /columns >}}


{{< columns src="/images/about/hkust_logo.svg" >}}

```
Undergraduate Research Assistant
Department of Electrical and Electronic Engineering,
Hong Kong University of Science and Technology, China
Aug. 2010 – May 2011
```

 - Project Topic: ASIC development for micro electrode array based testing platforms for the study of cell cultures involving low-noise front-end design and analogue-to-digital conversion.

```
Undergraduate Research Assistant
Department of Electrical and Electronic Engineering,
Hong Kong University of Science and Technology, China
Jun. 2010 – Dec. 2010
```

 - Project Topic: Feasibility study of opto-mechanical CMOS structures for
detecting aerosol micro-particles actuated by photonics involving modelling
of micro-scale mechanical oscillators for phonon emission.

{{< /columns >}}

# Academic Record

{{< columns src="/images/about/IC_white.svg" >}}

```
PhD Electrical Engineering
Department of Electrical and Electronic Engineering,
Imperial College London, United Kingdom,
Sept. 2012 – Aug. 2016
```

 - Engineering & Physical Sciences Research Council studentship (EPRC-1676620)
 - Thesis Topic: Large scale integration of CMOS based sensors for brain machine interfaces.


```
MSc Analogue and Digital IC Design
Department of Electrical and Electronic Engineering,
Imperial College London, United Kingdom,
Sept. 2011 – Aug. 2012
```

 - Graduated with Distinction
 - Thesis Topic: Ultra-wideband radio and telemetry for medical implants
 - Outstanding achievement prize for the MSc in A&D IC Design
 - Integrated circuit design lab prize for the MSc in A&D IC Design

{{< /columns >}}

{{< columns src="/images/about/hkust_logo.svg" >}}

```
BEng Analogue and Digital IC Design
Department of Electrical and Electronic Engineering,
Hong Kong University of Science and Technology, China
Aug. 2008 – May 2011
```

 - Graduated with First-Class Honours
 - Thesis Topic: CMOS Instrumentation for biological in-vitro multi-electrode systems.
 - Swire international young fellows program scholarship

{{< /columns >}}

# Other Activities


{{< columns src="/images/about/IEEE_logo.svg" >}}

During my tenure at Imperial College, I actively took part in [https://orcid.org/0000-0002-6899-2662](IEEE activities) through
conference attendance and made contributions to various journal publications.

 - [IEEE Analog Signal Processing Technical Comittee](https://ieee-cas.org/technical-committee/analog-signal-processing-asp) member from 2016 - 2018. 
 - Reviewed 40+ manuscripts in the past 5 years from JSSC, TCASI, TCASII, and TBCAS journals.
 - Organized the 2016 ICECS Conference Special Session: Oscillator-Based Computing.
 - Session-chair for IEEE 2017 & 2018 ISCAS Conference and Reviewer from 2013 to 2020.

{{< /columns >}}


# Personal Achievements

{{< columns src="/images/about/sscs_logo.svg" >}}

One of my main aspirations during my PhD was to publish in the prestigious
[IEEE Journal of Solid-State Circuits](https://sscs.ieee.org/publications/ieee-journal-of-solid-state-circuits-jssc)
which I successfully did 2018 on my second attempt. The publication presented
a voltage-controlled oscillator circuit for sensing neural activity with
integrated off-set rejection. The publication process took well over half a year
with the two rounds of peer-review in order to improve the article's presentation.

{{< /columns >}}


{{< columns src="/images/about/isa_logo.svg" >}}

In 2008, together with a couple of friends I founded the
[International Student Association](https://isa.hkust.edu.hk/) at HKUST which
as of 2022 is the 3rd largest student organization at the University. When
I started my studies in Hong Kong the international student community was still
relatively small and we mostly organized events among our selves. Encouraged
by the student-office we formed a group to represent the growing body of
international student and help each other adapt to the university lifestyle
away from home.

{{< /columns >}}